The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2025

Filed:

Jan. 07, 2020
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Hee Youl Lee, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0608 (2013.01); G06F 3/0616 (2013.01); G06F 3/0631 (2013.01); G06F 3/064 (2013.01); G06F 3/0652 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01);
Abstract

Disclosed herein are a memory device and a method of operating the memory device. The memory device may include a memory cell array, a peripheral circuit, and a control logic. The memory cell may a plurality of main memory blocks and a plurality of sub-memory blocks included in each of the main memory blocks. The peripheral circuit may perform a program operation on the main memory blocks or the sub-memory blocks, detect an amount of data loaded for the program operation, and output data amount information. The control logic may control the peripheral circuits so that, during the program operation, at least one memory block is selected from the main memory blocks or from the sub-memory blocks according to the data amount information and the program operation is performed on the selected memory block.


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