The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2025
Filed:
Dec. 21, 2020
Intel Corporation, Santa Clara, CA (US);
Saurabh Gayen, Portland, OR (US);
Philip R. Lantz, Cornelius, OR (US);
Dhananjay A. Joshi, Portland, OR (US);
Rupin H. Vakharwala, Hillsboro, OR (US);
Rajesh M. Sankaran, Portland, OR (US);
Narayan Ranganathan, Bangalore, IN;
Sanjay Kumar, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Techniques for offload device address translation fetching are disclosed. In the illustrative embodiment, a processor of a compute device sends a translation fetch descriptor to an offload device before sending a corresponding work descriptor to the offload device. The offload device can request translations for virtual memory address and cache the corresponding physical addresses for later use. While the offload device is fetching virtual address translations, the compute device can perform other tasks before sending the corresponding work descriptor, including operations that modify the contents of the memory addresses whose translation are being cached. Even if the offload device does not cache the translations, the fetching can warm up the cache in a translation lookaside buffer. Such an approach can reduce the latency overhead that the offload device may otherwise incur in sending memory address translation requests that would be required to execute the work descriptor.