The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2025

Filed:

Apr. 15, 2024
Applicant:

Rambus Inc., San Jose, CA (US);

Inventors:

Jun Kim, Los Altos Hills, CA (US);

Pak Shing Chau, Saratoga, CA (US);

Wayne S. Richardson, Saratoga, CA (US);

Assignee:

Rambus Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/08 (2006.01); G06F 1/10 (2006.01); G06F 13/16 (2006.01); H03L 7/07 (2006.01); H03L 7/081 (2006.01); H03L 7/099 (2006.01); H04L 7/00 (2006.01); H04L 7/10 (2006.01);
U.S. Cl.
CPC ...
G06F 1/08 (2013.01); G06F 1/10 (2013.01); G06F 13/1673 (2013.01); G06F 13/1689 (2013.01); H03L 7/07 (2013.01); H03L 7/0814 (2013.01); H03L 7/0995 (2013.01); H04L 7/0008 (2013.01); H04L 7/0033 (2013.01); H04L 7/10 (2013.01); Y02D 10/00 (2018.01);
Abstract

A memory system in which a timing drift that would occur in distribution of a first timing signal for data transport in a memory device is determined by measuring the actual phase delays occurring in a second timing signal that has a frequency lower than that of the first timing signal and is distributed in one or more circuits mimicking the drift characteristics of at least a portion of distribution of the first timing signal. The actual phase delays are determined in the memory device and provided to a memory controller so that the phases of the timing signals used for data transport may be adjusted based on the determined timing drift.


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