The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Jan. 26, 2024
Applicant:

Silanna Uv Technologies Pte Ltd, Singapore, SG;

Inventor:

Petar Atanackovic, Henley Beach South, AU;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10H 20/822 (2025.01); H01L 21/02 (2006.01); H01L 23/66 (2006.01); H01S 5/34 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 30/67 (2025.01); H10D 62/80 (2025.01); H10D 62/815 (2025.01); H10D 62/82 (2025.01); H10D 62/85 (2025.01); H10D 64/68 (2025.01); H10H 20/01 (2025.01); H10H 20/811 (2025.01); H10H 20/812 (2025.01); H10H 20/817 (2025.01); H10H 20/818 (2025.01); H10H 20/857 (2025.01); H10H 29/10 (2025.01);
U.S. Cl.
CPC ...
H10H 20/822 (2025.01); H01L 21/02178 (2013.01); H01L 21/02192 (2013.01); H01L 21/02194 (2013.01); H01L 21/0228 (2013.01); H01L 21/02458 (2013.01); H01L 21/02507 (2013.01); H01L 23/66 (2013.01); H01S 5/34 (2013.01); H10D 30/015 (2025.01); H10D 30/6755 (2025.01); H10D 62/80 (2025.01); H10D 62/8161 (2025.01); H10D 62/82 (2025.01); H10D 62/8503 (2025.01); H10D 64/691 (2025.01); H10H 20/01335 (2025.01); H10H 20/811 (2025.01); H10H 20/812 (2025.01); H10H 20/817 (2025.01); H10H 20/818 (2025.01); H10H 20/857 (2025.01); H10H 29/10 (2025.01); H01L 2223/6627 (2013.01); H10D 30/47 (2025.01); H10D 30/475 (2025.01);
Abstract

In some embodiments, the techniques described herein relate to an epitaxial oxide transistor. The transistor can include: a substrate; a channel layer including a first epitaxial semiconductor layer on the substrate; a gate layer including a second epitaxial semiconductor layer on the first epitaxial semiconductor layer; a source electrode and a drain electrode coupled to the channel layer; and a gate electrode coupled to the gate layer. The first epitaxial semiconductor layer can include a first polar oxide material and the second epitaxial semiconductor layer can include a second polar oxide material. The first polar oxide material and the second polar oxide material can include cation-polar surfaces oriented towards or away from the substrate, and the second polar oxide material can include a wider bandgap than the first polar oxide material.


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