The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Jul. 14, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventor:

Te-Chih Hsiung, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 84/013 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/834 (2025.01);
Abstract

A method for forming a semiconductor device is provided. The method includes forming first and second semiconductor fins over a semiconductor substrate; depositing a first isolation dielectric layer over the first and second semiconductor fins, the first isolation dielectric layer having a trench between the first and second semiconductor fins; depositing a second isolation dielectric layer having a first portion over a top surface of the first isolation dielectric layer and a second portion lining the trench of the first isolation dielectric layer; performing a chemical mechanical polish process to remove the first portion of the second isolation dielectric layer, while leaving the second portion of the second isolation dielectric layer to form an isolation dielectric plug between the first and second semiconductor fins; and after forming the isolation dielectric plug, forming first and second epitaxial structures over the first and second semiconductor fins.


Find Patent Forward Citations

Loading…