The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Jan. 10, 2022
Applicant:

Stmicroelectronics Pte Ltd, Singapore, SG;

Inventors:

Daniel Yap, Singapore, SG;

Hung Meng Loh, Bukit Panjang, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/48 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 23/498 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49861 (2013.01); H01L 21/4867 (2013.01); H01L 23/3114 (2013.01); H01L 23/49513 (2013.01); H01L 23/4952 (2013.01); H01L 23/49568 (2013.01); H05K 3/3452 (2013.01);
Abstract

A method of forming a solder connection includes forming a solder mask on a thermal pad of a printed circuit board. The solder mask leaves unmasked portions of the thermal pad and forming the solder mask includes forming a plurality of mask stripes extending from edges of each unmasked portion towards a center of the unmasked portion. The method includes depositing solder paste on the unmasked portions of the thermal pad and placing an exposed thermal pad of an integrated circuit package on the solder paste deposited on the thermal pad of the printed circuit board. The method includes forming a solder connection by heating the solder paste between the unmasked portions of the thermal pad on the printed circuit board and the exposed thermal pad of the integrated circuit package.


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