The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Jun. 12, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Shih-Wei Peng, Hsinchu, TW;

Te-Hsin Chiu, Hsinchu, TW;

Jiann-Tyng Tzeng, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/398 (2020.01); H01L 21/768 (2006.01); H01L 23/50 (2006.01); H01L 23/528 (2006.01); H10D 89/10 (2025.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/398 (2020.01); H01L 21/768 (2013.01); H01L 23/50 (2013.01); H01L 23/5286 (2013.01); H10D 89/10 (2025.01);
Abstract

An integrated circuit includes a first power rail, a first signal line, a first transistor and a second transistor. The first power rail is on a back-side of a substrate and is configured to supply a first supply voltage. The first signal line is on the back-side of the substrate and is separated from the first power rail. The first transistor has a first active region is in a front-side of the substrate. The first active region is overlapped by the first power rail and is electrically coupled to the first power rail. The second transistor has a second active region that is in the front-side of the substrate. The second active region is separated from the first active region, is overlapped by the first signal line, and is configured to receive the first supply voltage of the first power rail through the first active region of the first transistor.


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