The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Dec. 01, 2022
Applicant:

Auo Corporation, Hsinchu, TW;

Inventors:

Kuo-Jui Chang, Hsinchu, TW;

Wen-Tai Chen, Hsinchu, TW;

Chi-Sheng Chiang, Hsinchu, TW;

Yu-Chuan Liao, Hsinchu, TW;

Chien-Sen Weng, Hsinchu, TW;

Ming-Wei Sun, Hsinchu, TW;

Assignee:

AUO Corporation, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 21/28 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 64/66 (2025.01);
U.S. Cl.
CPC ...
H10D 64/679 (2025.01); H01L 21/28123 (2013.01); H10D 30/0314 (2025.01); H10D 30/0321 (2025.01); H10D 30/6715 (2025.01); H10D 30/673 (2025.01); H10D 30/6731 (2025.01); H10D 30/6745 (2025.01);
Abstract

A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.


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