Semiconductor memory device including vertical cell structure and method of fabricating the same

Abstract

A semiconductor memory device may include a stack including word lines and interlayer insulating patterns alternatingly stacked on a substrate, the word lines being extended in a first direction parallel to a top surface of the substrate, semiconductor patterns crossing the word lines and having a long axis extended in a second direction parallel to the top surface of the substrate, data storage patterns respectively interposed between the semiconductor patterns and the word lines, the data storage patterns including a ferroelectric material, bit lines extended in a third direction perpendicular to the top surface of the substrate and spaced apart from each other in the first direction, each of the bit lines being in contact with first side surfaces of the semiconductor patterns spaced apart from each other in the third direction, and a source line in contact with second side surfaces of the semiconductor patterns.