The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

May. 28, 2024
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Xianlei Cao, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/525 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5252 (2013.01); H01L 23/53295 (2013.01);
Abstract

A semiconductor structure includes: a core device region and an anti-fuse device region, disposed on a same substrate; a first dielectric layer, disposed on the substrate of the core device region and the anti-fuse device region, wherein the first dielectric layer has a first dielectric constant; a second dielectric layer, disposed on the first dielectric layer of the core device region; and a conductive layer, disposed on the second dielectric layer of the core device region and the first dielectric layer of the anti-fuse device region; wherein the second dielectric layer has a dielectric constant larger than the first dielectric constant.


Find Patent Forward Citations

Cao, Xianlei. (2025). Semiconductor structures of anti-fuse devices and core devices with different dielectric layers (U.S. Patent No. 12315799). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12315799

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…