Three-dimensional memory structure fabricated using repeated active stack sections

Abstract

A method for forming a three-dimensional memory structure above a semiconductor substrate includes forming two or more active stack sections, each formed on top of each other and separated by a dielectric buffer layer, where each active stack section includes multilayers separated by isolation dielectric layers and trenches with shafts filled with a sacrificial material. After the multiple active stack sections are formed, the method removes the sacrificial material in the shafts and removes portions of the dielectric buffer layer between shafts of adjacent active stack sections. The method fills the openings with a gate dielectric layer and a gate conductor. In some embodiments, the gate dielectric layer is discontinuous in the shaft over the depth of the multiple active stack sections.