The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Jun. 02, 2022
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Hongxin Kong, College Station, TX (US);

Wing-Kai Chow, Austin, TX (US);

Mehmet Can Yildiz, Austin, TX (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 111/04 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/394 (2020.01); G06F 30/392 (2020.01); G06F 2111/04 (2020.01); G06F 2119/12 (2020.01);
Abstract

Aspects of the present disclosure address systems and methods for zigzag detection and handling for integrated circuit designs. Data describing an integrated circuit is accessed. The integrated circuit design comprises a connection path between two or more pins of a net determined based on an initial routing of the net. A zigzag is detected in the connection path based on a local turn density constraint that specifies a ratio of a number of turns to a pathlength that corresponds to zigzagging in the net. In response to detecting the zigzag in the connection path, the zigzag is removed from the connection path by rerouting the net using a routing constraint that defines a maximum number of turns in the connection path.


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