The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Jul. 20, 2022
Applicants:

Sounil Biswas, San Jose, CA (US);

Amit Wangoo, Cupertino, CA (US);

Zhanwei Zhong, Milpitas, CA (US);

Inventors:

Sounil Biswas, San Jose, CA (US);

Amit Wangoo, Cupertino, CA (US);

Zhanwei Zhong, Milpitas, CA (US);

Assignee:

MARVELL ASIA PTE, LTD., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3187 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3187 (2013.01); G06F 13/4282 (2013.01);
Abstract

An integrated circuit verification system including automatic test equipment (ATE) and a device under test (DUT) having an internal test data de-serializer and test response data serializer. Specifically, the de-serializer of the DUT is able to de-serialize a test pattern or scan test data generated and received from an ATE at a general-purpose I/O pin (or functional pin) of the DUT for testing a circuit under test (CUT) of the DUT and then serialize the response to the test data with the serializer for output back to the ATE via the same or a different general-purpose I/O pin (or functional pin) of the DUT.


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