The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

Nov. 01, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Byounghak Hong, Albany, NY (US);

Seunghyun Song, Albany, NY (US);

Ki-Il Kim, Clifton Park, NY (US);

Gunho Jo, Clifton Park, NY (US);

Kang-Ill Seo, Springfield, VA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/822 (2006.01); H01L 21/8234 (2006.01); H01L 21/84 (2006.01); H01L 27/088 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10D 86/00 (2025.01); H10D 86/01 (2025.01); H10D 88/00 (2025.01);
U.S. Cl.
CPC ...
H10D 86/201 (2025.01); H10D 84/0128 (2025.01); H10D 84/0142 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01); H10D 86/01 (2025.01); H10D 88/01 (2025.01);
Abstract

Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.


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