The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

Sep. 15, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Chao Lin, Hefei, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/50 (2023.02); H10B 12/053 (2023.02); H10B 12/34 (2023.02); H10B 12/482 (2023.02);
Abstract

Embodiments relate to a semiconductor structure and a fabrication method thereof. The semiconductor structure has an array region and a peripheral region, and includes: a semiconductor substrate; a memory array structure positioned above the semiconductor substrate in the array region; a peripheral circuit structure positioned above the semiconductor substrate in the peripheral region; and a conductive connection structure positioned in the semiconductor substrate to electrically connect the memory array structure and the peripheral circuit structure. The semiconductor structure and the fabrication method thereof can effectively improve performance of a memory device.


Find Patent Forward Citations

Lin, Chao. (2025). Semiconductor structure and fabrication method thereof (U.S. Patent No. 12310007). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12310007

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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