The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

Dec. 14, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Mihai Capota, Portland, OR (US);

Guixiang Ma, Hillsboro, OR (US);

Shengtian Zhou, Palo Alto, CA (US);

Niranjan Hasabnis, Fremont, CA (US);

Nesreen Ahmed, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01); G06F 11/34 (2006.01); G06F 18/21 (2023.01); G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G06F 8/443 (2013.01); G06F 8/433 (2013.01); G06F 11/3428 (2013.01); G06F 18/217 (2023.01); G06N 20/00 (2019.01);
Abstract

Various examples relate to an apparatus, device, method, and computer program for determining a placement of an execution of a computer program, and to an apparatus, device, method, and computer program for training at least one machine-learning model. The apparatus for determining the placement of an execution of a computer program comprises processing circuitry that is configured to generate a graph representation of a computer program, generate, using a first machine-learning model, a vector embedding of the graph representation of the computer program, and to determine, based on an output of a second machine-learning model, a placement of an execution of the computer program on one or more hardware devices of a heterogenous plurality of hardware devices of a computer system, with the vector embedding and information on the load of the hardware devices being provided as input to the second machine-learning model.


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