The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

Sep. 24, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nagabhushan Reddy, Bangalore, IN;

Abhinay Gupta, Gwalior, IN;

Vinithra Janarthanan, Bangalore, IN;

Santhosh Raghuram Krishnaswamy, Bangalore, IN;

Pannerkumar Rajagopal, Bangalore, IN;

Siddharth Selvaraj, Coimbatore, IN;

Mihir Shah, Folsom, CA (US);

Vishwanath Somayaji, Haralur Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/30 (2006.01); G06F 1/3225 (2019.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 1/30 (2013.01); G06F 1/3225 (2013.01); G06F 11/076 (2013.01); G06F 11/0772 (2013.01); G06F 11/079 (2013.01);
Abstract

An apparatus comprises a first circuitry to perform, in response to a first message from an operating system, a first process to place a computer device in a first operating mode, store state information in a volatile memory of the computer device, and start a timer for a time-out period for performing the first process. First components of the computer device are in a low power state. A second circuitry to detect, after the time-out period, a failure of the first process. A third circuitry to perform, in response to the detected failure of the first process, a second process to place the computer device in a second operating mode and store state information in a non-volatile memory of the computer device. The volatile memory is operational in the first operating mode and is in a low power state in the second operating mode.


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