The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2025
Filed:
Apr. 17, 2023
Applicant:
Semiconductor Components Industries, Llc, Scottsdale, AZ (US);
Inventors:
Jonghwan Baek, Bucheon, KR;
JeongHyuk Park, Incheon, KR;
Seungwon Im, Seoul, KR;
Keunhyuk Lee, Suzhou, CN;
Assignee:
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/3107 (2013.01); H01L 23/3677 (2013.01); H01L 23/49524 (2013.01); H01L 23/49575 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 25/50 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01);
Abstract
Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.