The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Jan. 25, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Shih-Wei Peng, Hsinchu, TW;

Hui-Ting Yang, Hsinchu County, TW;

Wei-Cheng Lin, Taichung, TW;

Jiann-Tyng Tzeng, Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/535 (2006.01); H10D 89/10 (2025.01);
U.S. Cl.
CPC ...
H01L 23/5283 (2013.01); H01L 21/76816 (2013.01); H01L 23/481 (2013.01); H01L 23/5221 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H01L 23/535 (2013.01); H10D 89/10 (2025.01);
Abstract

A method of manufacturing a semiconductor device, including: forming a plurality of gate strips, wherein each gate strip is arranged to be a gate terminal of a transistor; forming a plurality of first metal strips above the plurality of gate strips; and forming a plurality of second metal strips above the plurality of first metal strips, wherein the plurality of second metal strips are co-planar, and each second metal strip and one of the first metal strips are crisscrossed from top view; wherein a length between two adjacent gate strips is twice as a length between two adjacent second metal strips, and a length of said one of the first metal strips is smaller than two and a half times as the length between two adjacent gate strips.


Find Patent Forward Citations

Peng, Shih-Wei. (2025). Method of manufacturing semiconductor device (U.S. Patent No. 12300608). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12300608

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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