The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Sep. 14, 2020
Applicant:

Shin-etsu Handotai Co., Ltd., Tokyo, JP;

Inventors:

Junya Suzuki, Annaka, JP;

Masakazu Sato, Nishigo-mura, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); C30B 30/00 (2006.01); G01N 21/47 (2006.01); G01B 21/20 (2006.01);
U.S. Cl.
CPC ...
H01L 22/20 (2013.01); C30B 30/00 (2013.01); G01N 21/47 (2013.01); H01L 22/12 (2013.01); G01B 21/20 (2013.01); G01B 2210/56 (2013.01);
Abstract

An evaluation method including steps of: acquiring profile measurement data on an entire surface in a thickness direction of a mirror-polished wafer; identifying a slice-cutting direction by performing first-order or second-order differentiation on diameter-direction profile measurement data on the wafer to acquire differential profiles at predetermined rotation angles and pitches, and comparing the acquired differential profiles; acquiring x-y grid data by performing first-order or second-order differentiation on profile measurement data at a predetermined pitch in a y-direction at a predetermined interval in an x-direction perpendicular to the y-direction, which is the identified slice-cutting direction; acquiring, from the x-y grid data, a maximum derivative value in an intermediate region including the wafer center in the y-direction and a maximum derivative value in upper-end-side and lower-end-side regions located outside the intermediate region; and judging failure incidence possibility in a device fabrication process based on the maximum derivative values.


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