The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2025
Filed:
Oct. 25, 2022
Realtek Semiconductor Corporation, Hsinchu, TW;
Fu-Chin Tsai, Hsinchu, TW;
Ger-Chih Chou, San Jose, CA (US);
Chun-Chi Yu, Hsinchu, TW;
Chih-Wei Chang, Hsinchu, TW;
REALTEK SEMICONDUCTOR CORPORATION, Hsinchu, TW;
Abstract
The present disclosure discloses a memory access interface device. A clock generation circuit generates reference clock signals. Each of access signal transmission circuits each includes a duty cycle adjusting circuit, a duty cycle detection circuit, a frequency division circuit and an asynchronous first-in-first-out circuit. The duty cycle adjusting circuit performs duty cycle adjustment on one of the reference clock signals according to a duty cycle detection signal to generate an output clock signal having a duty cycle. The duty cycle detection circuit detects a variation of the duty cycle to generate the duty cycle detection signal. The frequency division circuit divides a frequency of the output clock signal to generate a read clock signal. The asynchronous first-in-first-out circuit receives an access signal from a memory access controller and outputs an output access signal according to the read clock signal to access the memory device accordingly.