Semiconductor memory device and operating method thereof

Abstract

A semiconductor memory device includes a memory block, a peripheral circuit, and control logic. The memory block includes dummy memory cells connected to dummy word lines and normal memory cells connected to normal word lines. The peripheral circuit performs an erase operation on the memory block. The control logic controls an operation of the peripheral circuit. The control logic controls the peripheral circuit to perform a pre-program operation on first dummy memory cells connected to first dummy word lines among the dummy word lines, in response to an erase command for the memory block, and perform a pre-program operation on second dummy memory cells connected to second dummy word lines among the dummy word lines, after the pre-program operation on the first dummy memory cells. The control logic controls the peripheral circuit to perform an erase operation on the normal memory cells.