The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Jun. 25, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Anders Grunnet-Jepsen, San Jose, CA (US);

Paul Winer, Richmond, CA (US);

Alexey Supikov, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01M 11/02 (2006.01); G01J 9/00 (2006.01); G01J 9/02 (2006.01); G03H 1/02 (2006.01); G03H 1/08 (2006.01); G03H 1/22 (2006.01); G09G 3/34 (2006.01); H04N 9/31 (2006.01); H04N 13/327 (2018.01);
U.S. Cl.
CPC ...
G03H 1/2294 (2013.01); G01J 9/00 (2013.01); G01J 9/02 (2013.01); G01M 11/02 (2013.01); G01M 11/0271 (2013.01); G03H 1/024 (2013.01); G03H 1/0866 (2013.01); G09G 3/3466 (2013.01); H04N 9/3179 (2013.01); H04N 9/3191 (2013.01); H04N 13/327 (2018.05); G03H 2222/12 (2013.01); G03H 2225/23 (2013.01); G03H 2225/32 (2013.01); G03H 2226/02 (2013.01);
Abstract

Methods and apparatus to calibrate spatial light modulators are disclosed. Examples include processor circuitry to execute and/or instantiate instructions to provide a greyscale image to a spatial light modulator (SLM) to define voltages to be applied to individual pixels of the SLM. The voltages associated with pixel values in the greyscale image. The pixel values arranged in a double-slit grating pattern. The SLM to produce an interference pattern based on the double-slit grating pattern. The processor circuitry is to determine a phase difference between first and second gratings of the double-slit grating pattern based on the interference pattern. The processor circuitry is to generate a phase curvature based on the phase difference.


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