The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2025

Filed:

Aug. 08, 2023
Applicant:

Ememory Technology Inc., Hsinchu, TW;

Inventors:

Chun-Yuan Lo, Hsinchu County, TW;

Wu-Chang Chang, Hsinchu County, TW;

Bo-Chang Li, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/01 (2005.12); G11C 16/10 (2005.12); G11C 16/32 (2005.12); G11C 16/34 (2005.12); H03K 19/0185 (2005.12);
U.S. Cl.
CPC ...
H03K 19/018528 (2012.12); G11C 16/102 (2012.12); G11C 16/32 (2012.12); G11C 16/3459 (2012.12);
Abstract

A level shifter includes a cross-coupled transistor pair, first through third biased transistor pairs and a differential input pair sequentially coupled in series, and further includes a sub level shifter. The first biased transistor pair is controlled by a first reference voltage. The second biased transistor pair is controlled by a pair of differential control voltages. The third biased transistor pair is controlled by a second reference voltage lower than the first reference voltage. The differential input pair is controlled by a pair of differential input voltages. The sub level shifter generates the differential control voltages according to the differential input voltages and the first and second reference voltages. The differential control voltages are switched between the first and second reference voltages. The level shifter outputs a pair of differential output voltages through inverted and non-inverted output terminals coupled with the second biased transistor pair.


Find Patent Forward Citations

Loading…