The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2025

Filed:

Aug. 29, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nicholas A. Thomson, Hillsboro, OR (US);

Kalyan C. Kolluru, Portland, OR (US);

Adam Clay Faust, Portland, OR (US);

Frank Patrick O'Mahony, Portland, OR (US);

Ayan Kar, Portland, OR (US);

Rui Ma, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/677 (2005.12); H01L 27/02 (2005.12);
U.S. Cl.
CPC ...
H01L 27/0292 (2012.12); H01L 27/0255 (2012.12); H01L 27/0288 (2012.12);
Abstract

Disclosed herein are integrated circuit (IC) structures including backside vias, as well as related methods and devices. In some embodiments, an IC structure may include: a device layer, wherein the device layer includes a plurality of active devices; a first metallization layer over the device layer, wherein the first metallization layer includes a first conductive pathway in conductive contact with at least one of the active devices in the device layer; a second metallization layer under the device layer, wherein the second metallization layer includes a second conductive pathway; and a conductive via in the device layer, wherein the conductive via is in conductive contact with at least one of the active devices in the device layer and also in conductive contact with the second conductive pathway.


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