The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2025

Filed:

Aug. 24, 2022
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Yuki Murayama, Tokyo, JP;

Makoto Koshimizu, Tokyo, JP;

Takahiro Mori, Tokyo, JP;

Junjiro Sakai, Tokyo, JP;

Satoshi Iida, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/4757 (2005.12); H01L 21/311 (2005.12); H01L 21/475 (2005.12); H01L 21/4763 (2005.12); H01L 21/768 (2005.12); H01L 23/00 (2005.12); H01L 23/31 (2005.12); H01L 23/522 (2005.12); H01L 23/532 (2005.12);
U.S. Cl.
CPC ...
H01L 21/47573 (2012.12); H01L 21/31144 (2012.12); H01L 21/475 (2012.12); H01L 21/47635 (2012.12); H01L 23/3171 (2012.12); H01L 23/522 (2012.12); H01L 23/5329 (2012.12); H01L 23/53295 (2012.12); H01L 24/05 (2012.12); H01L 21/76837 (2012.12);
Abstract

There is formed a semiconductor device including, as the uppermost-layer wiring of the multilayer wiring layer, a plurality of first wirings, a second wiring, a plurality of first dummy wirings, a second dummy wiring, and a passivation film covering these wirings. The passivation film is patterned by etching with a photoresist film used as a mask, the plurality of first wirings and the plurality of first dummy wirings close thereto are densely formed, and the second dummy wiring is formed so as to surround a periphery of the second wiring sparsely formed directly above an analog circuit portion.


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