The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2025

Filed:

Feb. 01, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Wei-An Lai, Hsinchu, TW;

Shih-Wei Peng, Hsinchu, TW;

Wei-Cheng Lin, Hsinchu, TW;

Jiann-Tyng Tzeng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2005.12); H01L 21/8238 (2005.12); H01L 23/522 (2005.12); H03K 19/17736 (2019.12);
U.S. Cl.
CPC ...
H01L 27/0207 (2012.12); H01L 21/823871 (2012.12); H01L 23/5226 (2012.12); H03K 19/17744 (2012.12);
Abstract

An integrated circuit includes a horizontal routing track in a first metal layer, and a backside routing track in a backside metal layer. The backside metal layer and the first metal layer are formed at opposite sides of a semiconductor substrate. The horizontal routing track is conductively connected to a first terminal of a first transistor without passing through a routing track in another metal layer. The backside routing track is conductively connected to a second terminal of the first transistor without passing through a routing track in another metal layer. One of the first terminal and the second terminal is a gate terminal of the first transistor while another one the first terminal and the second terminal is either a source terminal or a drain terminal of the first transistor.


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