The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2025
Filed:
Mar. 17, 2022
Intel Corporation, Santa Clara, CA (US);
Dave A. Cavalcanti, Portland, OR (US);
Juan Fang, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A multi-link device (MLD) configured for reporting per-port frame replication and elimination for reliability (FRER) capabilities uses a per-Port FRER-capabilities object generated by upper MLD MAC layer to indicate per-Port FRER capabilities of lower layers including lower MAC and PHY layers. The per-port FRER capabilities of the lower layers may be reported using the per-Port FRER-capabilities object to an upper layer such as an FRER layer. The per-Port FRER-capabilities object may indicate at least whether or not a port between the upper MLD MAC layer and the FRER layer supports frame replication and duplication elimination capabilities in the underlying MAC and PHY layers.