The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2025

Filed:

Jun. 11, 2024
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Huijun Li, Beijing, CN;

Tinghua Shang, Beijing, CN;

Siyu Wang, Beijing, CN;

Yan Huang, Beijing, CN;

Lulu Yang, Beijing, CN;

Tingliang Liu, Beijing, CN;

Huijuan Yang, Beijing, CN;

Xiaofeng Jiang, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2015.12); H10K 59/121 (2022.12); H10K 59/126 (2022.12); H10K 59/131 (2022.12);
U.S. Cl.
CPC ...
G09G 3/3233 (2012.12); H10K 59/1213 (2023.01); H10K 59/131 (2023.01); G09G 2300/0426 (2012.12); G09G 2300/0809 (2012.12); G09G 2320/0209 (2012.12); H10K 59/126 (2023.01);
Abstract

A display substrate, including a base substrate, and a driving circuit layer and light emitting elements formed on the base substrate, and in a same pixel circuit, an active general layer includes a first column-wise active portion including active layers of a data writing transistor and a first light emission control transistor, and a first active connection portion, an orthographic projection of the first active connection portion on the base substrate at least partially overlapping an orthographic projection of a corresponding power supply line on the base substrate, a dimension of the first active connection portion in a row direction of the pixel units less than a dimension of the active layer of the data writing transistor in the row direction, and a dimension of the active layer of the first light emission control transistor in the row direction. A display panel is further provided.


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