The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2025

Filed:

Jun. 29, 2022
Applicant:

Ampere Computing Llc, Santa Clara, CA (US);

Inventors:

Sandeep Brahmadathan, Dublin, CA (US);

Jared Bendt, Hillsboro, OR (US);

Nagi Aboulenein, King City, OR (US);

Kedar Karandikar, Fremont, CA (US);

Stephan Jourdan, Portland, OR (US);

Assignee:

Ampere Computing LLC, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3187 (2005.12); G01R 31/317 (2005.12); G01R 31/3185 (2005.12); G01R 31/319 (2005.12); G06F 11/263 (2005.12); G06F 11/27 (2005.12); G06F 11/277 (2005.12); G06F 30/333 (2019.12); G11C 29/00 (2005.12); G11C 29/02 (2005.12); G11C 29/12 (2005.12); G11C 29/38 (2005.12); G11C 29/56 (2005.12);
U.S. Cl.
CPC ...
G01R 31/3187 (2012.12); G01R 31/31716 (2012.12); G01R 31/318566 (2012.12); G01R 31/31905 (2012.12); G01R 31/31917 (2012.12); G06F 11/263 (2012.12); G06F 11/27 (2012.12); G06F 11/277 (2012.12); G06F 30/333 (2019.12); G11C 29/003 (2012.12); G11C 29/022 (2012.12); G11C 29/12 (2012.12); G11C 29/1201 (2012.12); G11C 29/38 (2012.12); G11C 2029/5602 (2012.12);
Abstract

A component die validation built-in self-test (VBIST) engine is presented. In an aspect, a component die includes component circuitry for performing a component function, interface circuitry for communicating with another die, and a VBIST circuit. The VBIST circuit includes a traffic generator that generates test data streams, a tracker that receives and validates test data streams, and a configurable switching matrix for coupling the traffic generator to at least one of the component circuitry, the interface circuitry, or the tracker, and for coupling at least one of the component circuitry, the interface circuitry, or the traffic generator to the tracker. The VBIST circuit can send traffic to and from the component circuitry directly, or indirectly via the interface circuitry in loopback mode, and can be used for memory initialization and test.


Find Patent Forward Citations

Loading…