The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2025

Filed:

Dec. 29, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kuo-Chin Huang, Yilan, TW;

Tzu-Jui Wang, Fengshan, TW;

Hua-Mao Chen, Tainan, TW;

Chin-Chia Kuo, Tainan, TW;

Yuichiro Yamashita, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2005.12); H01L 31/107 (2005.12);
U.S. Cl.
CPC ...
H01L 27/14636 (2012.12); H01L 27/14627 (2012.12); H01L 31/107 (2012.12);
Abstract

The present disclosure describes a semiconductor device that includes a first die bonded to a second die with interconnect structures in the first die. The first die includes a photodiode having first and second electrodes on a first side of a first dielectric layer, and first, second, and third interconnect structures in the first dielectric layer. The first and second interconnect structures are connected to the first and second electrodes, respectively. The second electrode has a polarity opposite to the first electrode. The second and third interconnect structures extend to a second side opposite to the first side of the first dielectric layer. The second die includes a second dielectric layer and a fourth interconnect structure in the second dielectric layer. The second dielectric layer is bonded to the second side of the first dielectric layer. The fourth interconnect structure connects the second and third interconnect structures.


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