The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2025

Filed:

Jun. 01, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Yuxia Wang, Hefei, CN;

Kai Tian, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/3953 (2020.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/3953 (2020.01);
Abstract

An oscillator layout includes: a first row layout region constituted by sequentially arranging a second B layout region, second A layout region, third B layout region and third A layout region in parallel; and a second row layout region constituted by sequentially arranging a first A layout region, first B layout region, fourth A layout region and fourth B layout region in parallel. Inputs and outputs of the first A layout region, second A layout region, third A layout region and fourth A layout region constitute a first ring topology, inputs and outputs of the first B layout region and third B layout region constitute a second ring topology, inputs and outputs of the second B layout region and fourth B layout region constitute a third ring topology, the second ring topology and third ring topology are both electrically connected to the first ring topology.


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