The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2025
Filed:
Feb. 21, 2023
Nvidia Corporation, Santa Clara, CA (US);
Pervez Mirza Aziz, Dallas, TX (US);
Vishnu Balan, Saratoga, CA (US);
Rohit Rathi, Milpitas, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
Technologies for optimizing post-FEC bit error rate performance of a Forward Error Correction (FEC) system are described. A controller is coupled to an FEC circuit and a receiver circuit. The controller receives FEC symbol error data from the FEC circuit and determines, using the FEC symbol error data, a post-FEC correlated performance metric indicative of an estimated post-FEC BER of the FEC circuit. The controller adjusts, based on the post-FEC correlated performance metric, at least one of a FEC parameter of the FEC circuit or a link parameter of the receiver circuit to decrease the estimated post-FEC BER. This improves the post-FEC BER performance of the FEC circuit.