The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2025

Filed:

Mar. 08, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Kunal R. Parekh, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); G11C 7/18 (2006.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01); H01L 25/18 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); G11C 7/18 (2013.01); H01L 23/5283 (2013.01); H01L 24/05 (2013.01); H01L 25/18 (2013.01); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H01L 2924/1431 (2013.01); H01L 2924/1443 (2013.01);
Abstract

A method of forming a microelectronic device comprises forming a microelectronic device structure comprising a base structure, a doped semiconductive material overlying the base structure, a stack structure overlying the doped semiconductive material, cell pillar structures vertically extending through the stack structure and the doped semiconductive material and into the base structure, and digit line structures vertically overlying the stack structure. An additional microelectronic device structure comprising control logic devices is formed. The microelectronic device structure is attached to the additional microelectronic device structure to form a microelectronic device structure assembly. The base structure and portions of the cell pillar structures vertically extending into the base structure are removed to expose the doped semiconductive material. The doped semiconductive material is then patterned to form at least one source structure over the stack structure and coupled to the cell pillar structures. Microelectronic devices and electronic systems are also described.


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