The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2025

Filed:

Mar. 18, 2021
Applicant:

Changxin Memory Technologies, Inc., Anhui, CN;

Inventors:

Xiong Li, Hefei, CN;

Peng Feng, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10B 20/20 (2023.01); H10B 20/25 (2023.01);
U.S. Cl.
CPC ...
H10B 20/25 (2023.02);
Abstract

An anti-fuse unit structure includes a substrate, an anti-fuse device, and a select transistor. The anti-fuse device is formed in the substrate and comprises a first gate structure, a first source doped region, and a first drain doped region, wherein the first gate structure is electrically connected to the first drain doped region. The select transistor is formed in the substrate and matched with the anti-fuse device, and comprises a second gate structure, a second source doped region and a second drain doped region, wherein the second drain doped region is electrically connected to the first source doped region.


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Li, Xiong. (2025). Anti-fuse unit structure and anti-fuse array (U.S. Patent No. 12256538). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12256538

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