The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2025

Filed:

Sep. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

William K. Waller, Boise, ID (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/10 (2006.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
G11C 5/025 (2013.01); G11C 5/06 (2013.01); G11C 8/10 (2013.01); H01L 27/0207 (2013.01);
Abstract

In one embodiment, a non-volatile memory apparatus includes memory tiles comprising a set of main memory tiles in rows and columns, a set of row termination tiles at the ends of the rows, and a set of column termination tiles at the ends of the columns. Each memory tile includes a plurality of decks, with each deck comprising bitlines, wordlines orthogonal to the bitlines, and memory cells between overlapping areas of the bitlines and the wordlines. The bitlines/wordlines include a set of bitlines/wordlines of a first layer that traverse row/column termination tiles and main memory tiles adjacent the row/column termination tiles, with each bitline/wordline of the set of bitlines/wordlines connected to another bitline of a second layer in the termination tile.


Find Patent Forward Citations

Waller, William. (2025). Multi-deck non-volatile memory architecture with reduced termination tile area (U.S. Patent No. 12254946). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12254946

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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