The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2025

Filed:

Mar. 20, 2023
Applicants:

Stmicroelectronics International N.v., Geneva, CH;

Stmicroelectronics Application Gmbh, Aschheim-Dornach, DE;

Inventors:

Roberto Colombo, Munich, DE;

Vivek Mohan Sharma, New Delhi, IN;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/24 (2006.01); G01R 31/317 (2006.01); G01R 31/3185 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31721 (2013.01); G01R 31/31724 (2013.01); G01R 31/318566 (2013.01); G06F 1/24 (2013.01); G06F 11/1441 (2013.01);
Abstract

In an embodiment a processing system includes a reset circuit configured to receive a reset-request signal and one or more further reset-request signals, wherein the one or more further reset-request signals are provided by a processing core, one or more further circuits and/or a terminal of the processing system and to generate a combined reset-request signal by combining the reset-request signal and the one or more further reset-request signals, and a hardware test circuit including for each of the one or more further reset-request signals, a respective first combinational circuit configured to selectively assert the respective further reset-request signal, a second combinational logic circuit configured to selectively mask the combined reset-request signal, and a control circuit configured to repeat operations during a diagnostic phase.


Find Patent Forward Citations

Loading…