Non-volatile memory device and its operating method

Abstract

Disclosed herein are a non-volatile memory device and an operating method thereof. The non-volatile memory device includes a memory cell including a write transistor and a ferroelectric read transistor, a write word line connected to a gate terminal of the write transistor, a write bit line connected to a source terminal of the write transistor, a read word line connected to a source terminal of the ferroelectric read transistor, and a read bit line connected to a drain terminal of the ferroelectric read transistor, and a drain terminal of the write transistor may be connected to a gate terminal of the ferroelectric read transistor. According to the present invention, a low-power, high-density, and non-destructive dynamic random access memory (DRAM) can be implemented by realizing 2T0C FeDRAM based on a silicon complementary metal-oxide semiconductor (CMOS) process using a dielectric material.