The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Feb. 08, 2022
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Yu-Chung Lien, San Jose, CA (US);

Deepanshu Dutta, Fremont, CA (US);

Sarath Puthenthermadam, San Jose, CA (US);

Jiahui Yuan, Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/24 (2006.01); G11C 16/26 (2006.01); G11C 16/30 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/102 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3459 (2013.01); G11C 2211/5621 (2013.01);
Abstract

A non-volatile semiconductor memory device, described herein, comprises a bit line, a source line, a memory string comprising a plurality of memory cells connected in series between the source line and the bit line, and control circuitry coupled to the plurality of memory cells, the source line, and the bit line. The control circuitry is configured to: determine if a program operation is a single-bit program operation or multi-bit program operation; in response to the determination, identify a voltage level to set the source line to during performance of the program operation; and perform the program operation on the memory string, the program operation including setting the source line to the voltage level.


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