The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Jun. 26, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Rolf Riesen, Forest Grove, OR (US);

Robert Wisniewski, Ossining, NY (US);

Rajesh Poornachandran, Portland, OR (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/30 (2018.01); G06F 9/32 (2018.01); G06F 9/50 (2006.01); G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G06F 9/4856 (2013.01); G06F 9/30101 (2013.01); G06F 9/321 (2013.01); G06F 9/5038 (2013.01); G06N 20/00 (2019.01);
Abstract

Methods, apparatus, systems, and articles of manufacture are disclosed to relocate a compute thread, the apparatus comprising control circuitry to maintain a location of a plurality of domain access counters associated with a plurality of compute-memory domains for a first compute thread, and an execution monitor to set a first domain access counter of the plurality of domain access counters, the first domain access counter associated with a first compute-memory domain of the compute-memory domains, and relocate the first compute thread to a second compute-memory domain of the compute-memory domains in response to a comparison between a second domain access counter associated with the second compute-memory domain and the first domain access counter.


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