The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Sep. 30, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Chittranjan Mohan Gupta, Richardson, TX (US);

Yiqi Tang, Allen, TX (US);

Rajen Manicon Murugan, Dallas, TX (US);

Jie Chen, Plano, TX (US);

Tianyi Luo, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0655 (2013.01); H01L 21/565 (2013.01); H01L 23/3121 (2013.01); H01L 23/49816 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 24/85 (2013.01); H01L 25/50 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48157 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/19041 (2013.01);
Abstract

In examples, a semiconductor package comprises a substrate and multiple columns of semiconductor dies positioned approximately in parallel along a length of the substrate. The package also includes multiple passive components positioned between the multiple columns of semiconductor dies, the multiple passive components angled between 30 and 60 degrees relative to the length of the substrate, a pair of the multiple passive components having a gap therebetween that is configured to permit mold compound flow through capillary action. The package also includes a mold compound covering the substrate, the multiple columns of semiconductor dies, and the multiple passive components.


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