The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Jun. 26, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Arthur Jeremy Runyan, Folsom, CA (US);

Ratheesh Purushothaman Nair, Bangalore, IN;

Shailendra Singh Chauhan, Karnataka, IN;

Digant H. Solanki, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/4401 (2018.01); G06F 1/3218 (2019.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4413 (2013.01); G06F 1/3218 (2013.01); G06F 13/4081 (2013.01);
Abstract

Particular embodiments described herein provide for an electronic device that includes two or more displays and a BIOS. On startup, before the premem state and MRC initialization of the boot process, the BIOS causes power to be enabled to two or more displays. A display engine determines if a hot plug for each display is asserted and for each display where the hot plug was not asserted, the path to the display where the hot plug was not asserted is closed. In an example, the BIOS communicates the signal to power enable the first display and the second display after general-purpose input/output initialization during the boot process. After the premem stage and MRC initialization are completed, the first display and the second display are both configured to begin to display pixels.


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