The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2025

Filed:

Jan. 25, 2022
Applicants:

Denso Corporation, Kariya, JP;

Toyota Jidosha Kabushiki Kaisha, Toyota, JP;

Mirise Technologies Corporation, Nisshin, JP;

Inventors:

Hiroki Miyake, Nisshin, JP;

Tatsuji Nagaoka, Nisshin, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/425 (2006.01); H01L 21/46 (2006.01); H01L 21/461 (2006.01); H01L 21/479 (2006.01); H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); H01L 21/425 (2013.01); H01L 21/46 (2013.01); H01L 21/461 (2013.01); H01L 21/479 (2013.01); H01L 29/045 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes: preparing a substrate made of a compound semiconductor containing a first element and a second element that is bonded to the first element and has an electronegativity smaller than that of the first element by 1.5 or more; causing an electric current to flow in the substrate; and dividing the substrate at a position including a current region where the electric current is caused to flow and along a cleavage plane of the substrate. A method for manufacturing a semiconductor device includes: stacking a first substrate and a second substrate each made of the compound semiconductor; and bonding the first substrate and the second substrate by causing an electric current to flow between the first substrate and the second substrate.


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