The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 2025
Filed:
Sep. 07, 2021
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Sourabh Dongaonkar, Portland, OR (US);
Chetan Chauhan, Folsom, CA (US);
Jawad B. Khan, Portland, OR (US);
Sandeep K. Guliani, Folsom, CA (US);
William K. Waller, Eagle, ID (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 5/02 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1039 (2013.01); G11C 5/025 (2013.01); G11C 5/141 (2013.01); G11C 7/1069 (2013.01); G11C 7/1096 (2013.01);
Abstract
A memory accessed by rows and/or by columns in which an array of bits can be physically stored in multi-bit wide columns in physically contiguous rows is provided. A multi-bit wide logical column is arranged diagonally across (M/multi-bits) physical rows and (M/multi-bits) physical columns with each of the plurality of multi-bit wide logical columns in the logical row stored in a different physical row and physical multi-bit column.