The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2025

Filed:

Nov. 29, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Artur Antonyan, Seoul, KR;

Ji Eun Kim, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/408 (2006.01); G11C 11/4091 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); G11C 11/4087 (2013.01); G11C 11/4091 (2013.01);
Abstract

A nonvolatile memory device includes a memory cell array having nonvolatile memory cells therein, which are electrically connected to a plurality of word lines and a plurality of bit lines. A write driver and row decoder are provided, which are electrically connected to the plurality of bit lines and the plurality of word lines, respectively. Control logic is configured to transfer a first voltage to the write driver and a second voltage to the row decoder. The control logic includes: (i) a normal standby mode circuit configured to operate in a normal standby mode, and (ii) a deep standby mode circuit configured to operate in a deep standby mode. To save power, the layout areas of a plurality of elements within the deep standby mode circuit are smaller than layout areas of elements within the normal standby mode circuit, so that current flowing within the deep standby mode circuit during the deep standby mode is less than current flowing within the normal standby mode circuit during the normal standby mode.


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