The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2025

Filed:

Aug. 26, 2022
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Yamin Du, Richmond Hill, CA;

Vladimir Zlatkovic, Belmont, MA (US);

Alex Alexeyev, Beverly, MA (US);

De Zhong Cheng, Nepean, CA;

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4096 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); H03K 3/356113 (2013.01);
Abstract

An output driver includes a pullup driver, a pulldown driver and a resistive element. The pullup driver includes a first PMOS transistor having a source coupled to a first supply voltage and a gate receiving a first data representative of a transmitted data, and a second PMOS transistor having a source coupled to a drain of the first PMOS transistor and a gate receiving a first analog signal. The pulldown driver includes a first NMOS transistor having a source coupled to a second supply voltage and a gate receiving a second data representative of the transmitted data, and a second NMOS transistor having a source coupled to a drain of the first NMOS transistor, a drain coupled to a drain of the second PMOS transistor, and a gate receiving a second analog signal. The resistive element is coupled between the drain terminal of the second NMOS transistor and a pad.


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