The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 2025
Filed:
May. 27, 2021
Intel Corporation, Santa Clara, CA (US);
Saikat Mandal, Sacramento, CA (US);
Karol Szerszen, Hillsboro, OR (US);
Vasanth Ranganathan, El Dorado Hills, CA (US);
Altug Koker, El Dorado Hills, CA (US);
Michael Norris, Folsom, CA (US);
Prasoonkumar Surti, Folsom, CA (US);
Takahiro Murata, Folsom, CA (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
Generation and storage of compressed z-planes in graphics processing is described. An example of a processor includes a rasterizer to generate a fragment of pixel data including blocks of pixel data; a depth pipeline to receive the fragment, the pipeline including a first and second depth test hardware, the first depth test hardware to perform a coarse depth test including determining minimum and maximum depths for each block; and a depth buffer, wherein the processor is to determine whether the fragment meets requirements that the fragment fully covers a tile of pixel data and passes a first depth test, and that each of the minimum and maximum depths of the fragment has a same sign and exponent, and, upon determining that the fragment meets the requirements, to generate a compressed depth plane utilizing the first depth test and update the depth buffer with the compressed depth plane.