The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

May. 01, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Hugues Labbe, Granite Bay, CA (US);

Darrel Palke, Portland, OR (US);

Sherine Abdelhak, Beaverton, OR (US);

Jill Boyce, Portland, OR (US);

Varghese George, Folsom, CA (US);

Scott Janus, Loomis, CA (US);

Adam Lake, Portland, OR (US);

Zhijun Lei, Hillsboro, OR (US);

Zhengmin Li, Hillsboro, OR (US);

Mike MacPherson, Portland, OR (US);

Carl Marshall, Portland, OR (US);

Selvakumar Panneer, Portland, OR (US);

Prasoonkumar Surti, Folsom, CA (US);

Karthik Veeramani, Hillsboro, OR (US);

Deepak Vembar, Portland, OR (US);

Vallabhajosyula Srinivasa Somayazulu, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 17/20 (2006.01); G06N 3/08 (2023.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); G06T 15/00 (2011.01); G06T 15/40 (2011.01);
U.S. Cl.
CPC ...
G06T 15/005 (2013.01); G06N 3/08 (2013.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01); G06T 15/40 (2013.01); G06T 17/20 (2013.01);
Abstract

One embodiment provides a graphics processor comprising a block of execution resources, a cache memory, a cache memory prefetcher, and circuitry including a programmable neural network unit, the programmable neural network unit comprising a network hardware block including circuitry to perform neural network operations and activation operations for a layer of a neural network, the programmable neural network unit addressable by cores within the block of graphics cores and the neural network hardware block configured to perform operations associated with a neural network configured to determine a prefetch pattern for the cache memory prefetcher.


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