The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

Sep. 10, 2021
Applicant:

Ampere Computing Llc, Santa Clara, CA (US);

Inventors:

Sarthak Raina, Apex, NC (US);

Sanjay Patel, Cary, NC (US);

Hoan Tran, San Jose, CA (US);

Mitrajit Chatterjee, Los Altos, CA (US);

Abhishek Niraj, Cupertino, CA (US);

Anuradha Raghunathan, San Jose, CA (US);

Assignee:

Ampere Computing LLC, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/324 (2019.01); G01R 21/133 (2006.01); G06F 1/3206 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/324 (2013.01); G01R 21/133 (2013.01); G06F 1/3296 (2013.01);
Abstract

A system and method are described herein for estimating power usage of various components of a CPU and controlling voltage regulators based on the estimated power usage. The power estimates may be based on digital power meter readings at each component, on voltage information from a voltage regulator, and on other power information. This power information is transmitted over a mesh interconnect disposed throughout the CPU such that power estimation can be accurately calculated and used to control voltage regulators without being limited by external bus speeds. More of the power management processes and components may be disposed on the CPU and connected to the mesh interconnect. These power management processes include various calibrations, adjustments, and limits so as efficiently manage and use the more rapidly processed power estimations.


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