The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

Nov. 22, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Young Sea Cho, Seongnam-si, KR;

Wan Kim, Hwaseong-si, KR;

Yong Lim, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/38 (2006.01); H03M 1/12 (2006.01); H03M 1/06 (2006.01); H03M 1/46 (2006.01); H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
H03M 1/38 (2013.01); H03M 1/1245 (2013.01); H03M 1/0604 (2013.01); H03M 1/462 (2013.01); H03M 1/66 (2013.01);
Abstract

An analog-to-digital converter is provided. An analog-to-digital converter includes a comparator including a first input node receiving an output of a plurality of first unit capacitors and a second input node receiving an output of a plurality of second unit capacitors, a control logic configured to output first and second control signals on the basis of an output signal of the comparator, and a reference voltage adjustment circuit configured to adjust an output voltage provided to the comparator on the basis of the first and second control signals. The reference voltage adjustment circuit comprises a first pull-up circuit configured to apply a first reference voltage to each of the plurality of first unit capacitors and a first pull-down circuit configured to apply a second reference voltage to each of the plurality of second unit capacitors, based on v.


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